1. Field of the Invention
The present invention generally relates to a data weighted average (DWA) structure and a digital-to-analog signal conversion method, in particular, to a DWA structure and a digital-to-analog signal conversion method for reducing errors caused by element mismatch.
2. Description of Related Art
Digital-to-analogy converters (DACs) and analog-to-digital converters (ADCs) have been broadly applied to communication systems, consumer electronic products, and audio equipments etc. However, within DACs or ADCs, non-linear problems caused by element mismatch are inevitable, and such problems are very crucial to a sigma-delta modulator (SDM).
Dynamic element matching (DEM) has been provided for resolving the non-linear problems in DACs, wherein data weighted averaging (DWA) is a well-known DEM algorithm. Generally speaking, DWA realizes first-order noise shaping and reduces element mismatch effect. In addition, DWA can reduce capacitor mismatch at the input terminal of analog circuits (for example, a switched-capacitor reconstruction filter, SCF) in DACs; thus, DWA has good signal noise ratio (SNR) and total harmonic distortion (THD) performance.
However, the existing DWA structures still have some problems. For example, in-band tone may be produced in the existing DWA structures, thus, the spur-free dynamic range (SFDR) performance may not be satisfactory. In addition, existing high resolution DACs have low efficiency and large circuit area.
Accordingly, a new DWA structure having foregoing and/or other advantages but without foregoing and/or other problems is to be provided.